Namespaces allocation in non-volatile memory devices

ABSTRACT

A computer storage device having a host interface, a controller, non-volatile storage media, and firmware. The firmware instructs the controller to: receive, via the host interface, a request from a host to allocate a namespace of a quantity of non-volatile memory; generate, in response to the request, a namespace map identifying a plurality of blocks of addresses having a same predetermined block size, and a partial block of addresses having a size smaller than the predetermined block size; and convert, using the namespace map, logical addresses in the namespace communicated from the host to physical addresses for the quantity of the non-volatile memory. For example, the request for allocating the namespace can be in accordance with an NVMe protocol.

RELATED APPLICATIONS

The present application is a continuation application of U.S. patentapplication Ser. No. 18/054,666 filed Nov. 11, 2022, which is acontinuation application of U.S. patent application Ser. No. 17/184,487filed Feb. 24, 2021 and issued as U.S. Pat. No. 11,520,484 on Dec. 6,2022, which is a continuation application of U.S. patent applicationSer. No. 16/520,204 filed Jul. 23, 2019 and issued as U.S. Pat. No.10,969,963 on Apr. 6, 2021, which is a continuation application of U.S.patent application Ser. No. 15/790,882 filed Oct. 23, 2017 and issued asU.S. Pat. No. 10,437,476 on Oct. 8, 2019, the entire disclosures ofwhich applications are hereby incorporated herein by reference.

TECHNICAL FIELD

At least some embodiments disclosed herein relate to computer storagedevices in general and more particularly, but not limited to namespaceallocation in non-volatile storage devices.

BACKGROUND

Typical computer storage devices, such as hard disk drives (HDDs), solidstate drives (SSDs), and hybrid drives, have controllers that receivedata access requests from host computers and perform programmedcomputing tasks to implement the requests in ways that may be specificto the media and structure configured in the storage devices, such asrigid rotating disks coated with magnetic material in the hard diskdrives, integrated circuits having memory cells in solid state drives,and both in hybrid drives.

A standardized logical device interface protocol allows a host computerto address a computer storage device in a way independent from thespecific media implementation of the storage device.

For example, non-volatile memory host controller interface specification(NVMHCI), also known as NVM express (NVMe), specifies the logical deviceinterface protocol for accessing non-volatile storage devices via aperipheral component interconnect express (PCI express or PCIe) bus.

BRIEF DESCRIPTION OF THE DRAWINGS

The embodiments are illustrated by way of example and not limitation inthe figures of the accompanying drawings in which like referencesindicate similar elements.

FIG. 1 shows a computer system in which embodiments of inventionsdisclosed herein can be implemented.

FIG. 2 illustrates an example of allocating multiple namespaces directlyaccording to the requested sizes of the namespaces.

FIG. 3 illustrates an example of allocating namespaces via mappingblocks of logical addresses.

FIG. 4 illustrates an example of data structures for namespace mapping.

FIG. 5 shows a system to translate addresses in a non-volatile memorydevice to support namespace management.

FIG. 6 shows a method to manage namespaces based on blocks of logicaladdresses.

FIG. 7 shows an example diagram where a namespace is not aligned withblock boundaries and can be implemented using the techniques of FIGS.8-10 .

FIG. 8 illustrates an example block diagram of a namespace map toimplement a namespace that is not aligned with block boundaries.

FIG. 9 illustrates an example partial block identifier that can be usedto implement the namespace map of FIG. 8 .

FIG. 10 illustrates an example data structure to manage a pool of freeblocks available for namespace allocation using the technique of FIG. 8.

FIG. 11 illustrates an example of allocating namespaces using partialblocks.

FIG. 12 shows a method to allocate a namespace on a storage deviceaccording to one embodiment.

DETAILED DESCRIPTION

At least some embodiments disclosed herein provide efficient andflexible ways to implement logical storage allocations and management instorage devices.

Physical memory elements of a storage device can be arranged as logicalmemory blocks addressed via logical block addressing (LBA). A logicalmemory block is the smallest LBA addressable memory unit; and each LBAaddress identifies a single logical memory block that can be mapped to aparticular physical address of a memory unit in the storage device.

The concept of namespace for storage device is similar to the concept ofpartition in a hard disk drive for creating logical storages. Differentportions of a storage device can be allocated to different namespacesand thus can have LBA addresses configured independently from each otherwithin their respective namespaces. Each namespace identifies a quantityof memory of the storage device addressable via LBA. A same LBA addresscan be used in different namespaces to identify different memory unitsin different portions of the storage device. For example, a firstnamespace allocated on a first portion of the storage device having nmemory units can have LBA addresses ranging from 0 to n−1; and a secondnamespace allocated on a second portion of the storage device having mmemory units can have LBA addresses ranging from 0 to m−1.

A host computer of the storage device may send a request to the storagedevice for the creation, deletion, or reservation of a namespace. Aftera portion of the storage capacity of the storage device is allocated toa namespace, an LBA address in the respective namespace logicallyrepresents a particular memory unit in the storage media, although theparticular memory unit logically represented by the LBA address in thenamespace may physically correspond to different memory units atdifferent time instances (e.g., as in SSDs).

There are challenges in efficiently implementing the mapping of LBAaddresses defined in multiple namespaces into physical memory elementsin the storage device and in efficiently using the storage capacity ofthe storage device, especially when it is desirable to dynamicallyallocate, delete and further allocate on the storage device multiplenamespaces with different, varying sizes. For example, the portion ofthe storage capacity allocated to a deleted namespace may not besufficient to accommodate the allocation of a subsequent namespace thathas a size larger than the deleted namespace; and repeated cycles ofallocation and deletion may lead to fragmentation of the storagecapacity that may lead to inefficient mapping of LBA addresses tophysical addresses and/or inefficient usage of the fragmented storagecapacity of the storage device.

At least some embodiments of the inventions disclosed herein address thechallenges through a block by block map from LBA addresses defined inallocated namespaces to LBA addresses defined on the entire storagecapacity of the storage device. After mapping the LBA addresses definedin allocated namespaces into the LBA addresses defined on the entirestorage capacity of the storage device, the corresponding LBA addressesdefined on the entire storage capacity of the storage device can befurther mapped to the physical storage elements in a way independent ofthe allocations of namespaces on the device. When the block by blockmapping of LBA addresses is based on a predetermined size block size, anefficient data structure can be used for the efficient computation ofLBA addresses defined on the entire storage capacity of the storagedevice from the LBA addresses defined in the allocated namespaces.

For example, the entire storage capacity of the storage device can bedivided into blocks of LBA addresses according to a predetermined blocksize for flexibility and efficiency in namespace management. The blocksize represents the number of LBA addresses in a block. A block of thepredetermined block size may be referred to hereafter as an L-block, afull L-block, a full LBA block, an LBA block, or sometimes simply as afull block or a block. The block by block namespace mapping from LBAaddresses defined in allocated namespaces to LBA addresses defined onthe entire storage capacity of the storage device allows the allocationof non-contiguous LBA addresses defined on the entire storage to anamespace, which can reduce fragmentation of the storage capacity causedby cycles of namespace allocation and deletion and improve efficiency inthe usage of the storage capacity.

Preferably, the block size of L-blocks is predetermined and is a powerof two (2) to simplify computations involved in mapping of addresses forthe L-blocks. In other instances, an optimized block size may bepredicted or calculated, using an artificial intelligence technique,through machine learning from the namespace usage histories in thestorage device and/or other similarly used storage devices.

To improve the usage efficiency of L-Blocks, one embodiment disclosedherein includes a data structure for the identification of a partialblock that is a portion of a full block such that a namespace having asize that is not a multiple of the block size can be allocated in theform of one or more full blocks and one partial block to balance theefficiency in LBA address mapping calculation and the efficiency instorage usage.

FIG. 1 shows a computer system in which embodiments of inventionsdisclosed herein can be implemented.

In FIG. 1 , a host (101) communicates with a storage device (103) via acommunication channel having a predetermined protocol. The host (101)can be a computer having one or more central processing units (CPUs) towhich computer peripheral devices, such as the storage device (103), maybe attached via an interconnect, such as a computer bus (e.g.,peripheral component interconnect (PCI), PCI extended (PCI-X), PCIexpress (PCIe)), a communication portion, and/or a computer network.

The computer storage device (103) can be used to store data for the host(101). Examples of computer storage devices in general include hard diskdrives (HDDs), solid state drives (SSDs), flash memory, dynamicrandom-access memory, magnetic tapes, network attached storage device,etc. The storage device (103) has a host interface (105) that implementscommunications with the host (101) using the communication channel. Forexample, the communication channel between the host (101) and thestorage device (103) is a PCIe bus in one embodiment; and the host (101)and the storage device (103) communicate with each other using NVMeprotocol.

In some implementations, the communication channel between the host(101) and the storage device (103) includes a computer network, such asa local area network, a wireless local area network, a wireless personalarea network, a cellular communications network, a broadband high-speedalways-connected wireless communication connection (e.g., a current orfuture generation of mobile network link); and the host (101) and thestorage device (103) can be configured to communicate with each otherusing data storage management and usage commands similar to those inNVMe protocol.

The storage device (103) has a controller (107) that runs firmware (104)to perform operations responsive to the communications from the host(101). Firmware in general is a type of computer program that providescontrol, monitoring and data manipulation of engineered computingdevices. In FIG. 1 , the firmware (104) controls the operations of thecontroller (107) in operating the storage device (103), such as theallocation of namespaces for storing and accessing data in the storagedevice (103), as further discussed below.

The storage device (103) has non-volatile storage media (109), such asmagnetic material coated on rigid disks, and memory cells in anintegrated circuit. The storage media (109) is non-volatile in that nopower is required to maintain the data/information stored in thenon-volatile storage media (109), which data/information can beretrieved after the non-volatile storage media (109) is powered off andthen powered on again. The memory cells may be implemented using variousmemory/storage technologies, such as NAND gate based flash memory,phase-change memory (PCM), magnetic memory (MRAM), resistiverandom-access memory, and 3D XPoint, such that the storage media (109)is non-volatile and can retain data stored therein without power fordays, months, and/or years.

The storage device (103) includes volatile dynamic random-access memory(DRAM) (106) for the storage of run-time data and instructions used bythe controller (107) to improve the computation performance of thecontroller (107) and/or provide buffers for data transferred between thehost (101) and the non-volatile storage media (109). DRAM (106) isvolatile in that it requires power to maintain the data/informationstored therein, which data/information is lost immediately or rapidlywhen the power is interrupted.

Volatile DRAM (106) typically has less latency than non-volatile storagemedia (109), but loses its data quickly when power is removed. Thus, itis advantageous to use the volatile DRAM (106) to temporarily storeinstructions and data used for the controller (107) in its currentcomputing task to improve performance. In some instances, the volatileDRAM (106) is replaced with volatile static random-access memory (SRAM)that uses less power than DRAM in some applications. When thenon-volatile storage media (109) has data access performance (e.g., inlatency, read/write speed) comparable to volatile DRAM (106), thevolatile DRAM (106) can be eliminated; and the controller (107) canperform computing by operating on the non-volatile storage media (109)for instructions and data instead of operating on the volatile DRAM(106).

For example, cross point storage and memory devices (e.g., 3D XPointmemory) have data access performance comparable to volatile DRAM (106).A cross point memory device uses transistor-less memory elements, eachof which has a memory cell and a selector that are stacked together as acolumn. Memory element columns are connected via two perpendicularlayers of wires, where one layer is above the memory element columns andthe other layer below the memory element columns. Each memory elementcan be individually selected at a cross point of one wire on each of thetwo layers. Cross point memory devices are fast and non-volatile and canbe used as a unified memory pool for processing and storage.

In some instances, the controller (107) has in-processor cache memorywith data access performance that is better than the volatile DRAM (106)and/or the non-volatile storage media (109). Thus, it is preferred tocache parts of instructions and data used in the current computing taskin the in-processor cache memory of the controller (107) during thecomputing operations of the controller (107). In some instances, thecontroller (107) has multiple processors, each having its ownin-processor cache memory.

Optionally, the controller (107) performs data intensive, in-memoryprocessing using data and/or instructions organized in the storagedevice (103). For example, in response to a request from the host (101),the controller (107) performs a real time analysis of a set of datastored in the storage device (103) and communicates a reduced data setto the host (101) as a response. For example, in some applications, thestorage device (103) is connected to real time sensors to store sensorinputs; and the processors of the controller (107) are configured toperform machine learning and/or pattern recognition based on the sensorinputs to support an artificial intelligence (AI) system that isimplemented at least in part via the storage device (103) and/or thehost (101).

In some implementations, the processors of the controller (107) areintegrated with memory (e.g., 106 or 109) in computer chip fabricationto enable processing in memory and thus overcome the von Neumannbottleneck that limits computing performance as a result of a limit inthroughput caused by latency in data moves between a processor andmemory configured separately according to the von Neumann architecture.The integration of processing and memory increases processing speed andmemory transfer rate, and decreases latency and power usage.

The storage device (103) can be used in various computing systems, suchas a cloud computing system, an edge computing system, a fog computingsystem, and/or a standalone computer. In a cloud computing system,remote computer servers are connected in a network to store, manage, andprocess data. An edge computing system optimizes cloud computing byperforming data processing at the edge of the computer network that isclose to the data source and thus reduces data communications with acentralize server and/or data storage. A fog computing system uses oneor more end-user devices or near-user edge devices to store data andthus reduces or eliminates the need to store the data in a centralizeddata warehouse.

At least some embodiments of the inventions disclosed herein can beimplemented using computer instructions executed by the controller(107), such as the firmware (104). In some instances, hardware circuitscan be used to implement at least some of the functions of the firmware(104). The firmware (104) can be initially stored in the non-volatilestorage media (109), or another non-volatile device, and loaded into thevolatile DRAM (106) and/or the in-processor cache memory for executionby the controller (107).

For example, the firmware (104) can be configured to use the techniquesdiscussed below in managing namespaces. However, the techniquesdiscussed below are not limited to being used in the computer system ofFIG. 1 and/or the examples discussed above.

FIG. 2 illustrates an example of allocating multiple namespaces directlyaccording to the requested sizes of the namespaces.

For example, the method of FIG. 2 can be implemented in the storagedevice (103) illustrated in FIG. 1 . The non-volatile storage media(109) of the storage device (103) has memory units that may beidentified by a range of LBA addresses (222, 224, . . . ), where therange corresponds to a memory capacity (220) of the non-volatile storagemedia (109).

In FIG. 2 , namespaces (221, 223) are allocated directly from thecontiguous, available region of the capacity (220). When one of thepreviously allocated namespaces (221, 223) is deleted, the remainingcapacity (220), free for allocation to another namespace, may becomefragmented, which limits the options for the selection of the size of asubsequent new namespace.

For example, when the namespace (221) illustrated in FIG. 2 is deletedand the namespace (223) remains to be allocated in a region asillustrated in FIG. 2 , the free portions of the capacity (220) arefragmented, limiting the choices of the size of the subsequent newnamespace to be the same as, or smaller than, the size of the namespace(221).

To improve the flexibility for dynamic namespace management and supportiterations of creation and deletion of namespaces of different sizes, ablock-wise mapping/allocation of logical addresses can be used, asfurther discussed below.

FIG. 3 illustrates an example of allocating namespaces via mappingblocks of logical addresses.

In FIG. 3 , the capacity (220) of the storage device (103) is dividedinto L-blocks, or blocks (231, 233, . . . , 237, 239) of LBA addressesthat are defined on the entire capacity of the storage device (103). Toimprove efficiency in address mapping, the L-blocks (231, 233, . . . ,237, 239) are designed to have the same size (133). Preferably, theblock size (133) is a power of two (2), such that operations ofdivision, modulo, and multiplication involving the block size (133) canbe efficiently performed via shift operations.

After the capacity (220) is divided into L-blocks (231, 233, . . . ,237, 239) illustrated in FIG. 3 , the allocation of a namespace (e.g.,221 or 223) does not have to be from a contiguous region of the capacity(220). A set of L-blocks (231, 233, . . . , 237, 239) fromnon-contiguous regions of the capacity (220) can be allocated from anamespace (e.g., 221 or 223). Thus, the impact of fragmentation on thesize availability in creating new namespaces, which impact may resultfrom the deletion of selected previously-created namespaces, iseliminated or reduced.

For example, non-contiguous L-blocks (233 and 237) in the capacity (220)can be allocated to contiguous regions (241 and 243) of the namespace(221) through block-wise mapping; and non-contiguous L-blocks (231 and239) in the capacity (220) can be allocated to contiguous regions (245and 247) of the namespace (223) via block-wise mapping.

When the block size (133) is reduced, the flexibility of the system indynamic namespace management increases. However, a reduced block size(133) also increases the number of blocks to be mapped, which decreasesthe computation efficiency in address mapping. An optimal block size(133) balances the tradeoff between flexibility and efficiency; and aparticular block size (133) can be selected for the specific usage of agiven storage device (103) in a specific computing environment.

FIG. 4 illustrates an example of data structures for namespace mapping.

For example, the data structures for namespace mapping of FIG. 4 can beused to implement the block-wise address mapping illustrated in FIG. 3 .The data structure of FIG. 4 is lean in memory footprint and optimal incomputational efficiency.

In FIG. 4 , a namespace map (273) stores an array of the identificationsof L-blocks (e.g., 231, 233, . . . , 237, 239) that have been allocatedto a set of namespaces (e.g., 221, 223) identified in namespace info(271).

In the array of the namespace map (273), the identifications of L-blocks(301, . . . , 302; 303, . . . , 304; 305, . . . 308; or 309, . . . ,310) allocated for each namespace (281, 283, 285, or 287) are stored ina contiguous region of the array. Thus, the portions of identificationsof L-blocks (301, . . . , 302; 303, . . . , 304; 305, . . . 308; and309, . . . , 310) allocated for different namespaces (281, 283, 285, and287) can be told apart from the identification of the starting addresses(291, 293, 295, and 297) of the block identifications in the array.

Optionally, for each of the each namespaces (281, 283, 285, or 287), thenamespace info (271) identifies whether or not the L-blocks (301, . . ., 302; 303, . . . , 304; 305, . . . 308; or 309, . . . , 310) allocatedfor the respective namespaces (281, 283, 285, or 287) is contiguous onthe logical addresses in the capacity (220).

For example, when the capacity (220) is divided into 80 blocks, theL-blocks may be identified as L-blocks 0 through 79. Since contiguousblocks 0 through 19 (301 and 302) are allocated for namespace 1 (281),the contiguous indicator (292) of the namespace 1 (281) has a valueindicating that the sequence of L-blocks, identified via the blockidentifiers starting at a starting address (291) in the array of thenamespace map (273), occupy a contiguous region in the logical addressspace/capacity (220).

Similarly, L-blocks 41 through 53 (303 and 304) allocated for namespace2 (283) are contiguous; and thus, a contiguous indicator (294) of thenamespace 2 (283) has the value indicating that the list of L-blocks,identified via the block identifiers starting at a starting address(293) in the array of the namespace map (273), are in a contiguousregion in the logical address space/capacity (220).

Similarly, L-blocks 54 through 69 (309 and 310) allocated for namespace4 (287) are contiguous; and thus, a contiguous indicator (298) of thenamespace 4 (287) has the value indicating that the list of blocks,identified via the block identifiers starting at a starting address(297) in the array of the namespace map (273) occupies a contiguousregion in the logical address capacity (220). It is preferable, but notrequired, that the L-blocks allocated for a namespace are in acontiguous region in the mapped logical address space/capacity (220).

FIG. 4 illustrates that blocks 22, 25, 30 and 31 (305, 306, 307 and 308)allocated for namespace 3 (285) are non-contiguous; and a contiguousindicator (296) of the namespace 3 (285) has a value indicating that thelist of blocks, identified via the block identifiers starting at astarting address (295) in the array of in the namespace map (273), isallocated from a non-contiguous regions in the mapped logical addressspace/capacity (220).

In some instances, a storage device (103) can allocate up to apredetermined number of namespaces. Null addresses can be used asstarting addresses of namespaces that have not yet been allocated. Thus,the namespace info (271) has a predetermined data size that is afunction of the predetermined number of namespaces allowed to beallocated on the storage device (103).

Optionally, the data structure includes a free list (275) that has anarray storing the identifiers of L-blocks (321-325, . . . , 326-327, . .. , 328-329, . . . , 330) that have not yet been allocated to any of theallocated namespaces (281, 283, 285, 287) identified in the namespaceinfo (271).

In some instances, the list of identifiers of L-blocks (321-330) in thefree list (275) is appended to the end of the list of identifiers ofL-blocks (301-310) that are currently allocated to the namespaces (281,283, 285, 287) identified in the namespace info (271). A free blockstarting address field can be added to the namespace info (271) toidentify the beginning of the list of identifiers of the L-blocks(321-330) that are in the free list (275). Thus, the namespace map (273)has an array of a predetermined size corresponding to the total numberof L-blocks on the capacity (220).

FIG. 5 shows a system to translate addresses in a non-volatile memorydevice to support namespace management. For example, the system of FIG.5 can be implemented using a storage device (103) illustrated in FIG. 1, a logical address mapping technique illustrated in FIG. 3 , and a datastructure similar to that illustrated in FIG. 4 .

In FIG. 5 , an administrative manager (225), a data manager (227) (orreferred to as an I/O manager), and a local manager (229) areimplemented as part of the firmware (e.g., 104) of a storage device(e.g., 103 illustrated in FIG. 1 ).

The administrative manager (225) receives commands (e.g., 261, 263, 265)from the host (e.g., 101 in FIG. 1 ) to create (261), delete (263), orchange (265) a namespace (e.g., 221 or 223). In response, theadministrative manager (225) generates/updates a namespace map (255),such as the namespace map (273) to implement the mapping illustrated inFIG. 2 or 9 . A namespace (e.g., 221 or 223) may be changed to expand orshrink its size (e.g., by allocating more blocks for the namespace, orreturning some of its blocks to the pool of free blocks).

The data manager (227) receives data access commands. A data accessrequest (e.g., read, write) from the host (e.g., 101 in FIG. 1 )identifies a namespace ID (251) and an LBA address (253) in thenamespace ID (251) to read, write, or erase data from a memory unitidentified by the namespace ID (251) and the LBA address (253). Usingthe namespace map (255), the data manager (227) converts the combinationof the namespace ID (251) and the LBA address (253) to a mapped logicaladdress (257) in the corresponding L-block (e.g., 231, 233, . . . , 237,239).

The local manager (229) translates the mapped logical address (257) to aphysical address (259). The logical addresses in the L-block (e.g., 231,233, . . . , 237, 239) can be mapped to the physical addresses (259) inthe storage media (e.g., 109 in FIG. 1 ), as if the mapped logicaladdresses (257) were virtually allocated to a virtual namespace thatcovers the entire non-volatile storage media (109).

Thus, the namespace map (255) can be seen to function as a block-wisemap of logical addresses defined in a current set of namespaces (221,223) created/allocated on the storage device (103) to the mapped logicaladdresses (257) defined on the virtual namespace. Since the virtualnamespace does not change when the current allocation of the current setof namespaces (221, 223) changes, the details of the current namespaces(221, 223) are completely shielded from the local manager (229) intranslating the mapped logical addresses (e.g., 257) to physicaladdresses (e.g., 259).

Preferably, the implementation of the namespace map (255) is lean inmemory footprint and optimal in computational efficiency (e.g., using adata structure like the one illustrated in FIG. 4 ).

In some instances, the storage device (103) may not have a storagecapacity (220) that is a multiple of a desirable block size (133).Further, a requested namespace size may not be a multiple of thedesirable block size (133). The administrative manager (225) may detectthe misalignment of the desirable block size (133) with the storagecapacity (220) and/or the misalignment of a requested namespace sizewith the desirable block size (133), causing a user to adjust thedesirable block size (133) and/or the requested namespace size.Alternatively or in combination, the administrative manager (225) mayallocate a full block to a portion of a misaligned namespace and/or notuse a remaining part of the allocated full block.

FIG. 6 shows a method to manage namespaces based on blocks of logicaladdresses. For example, the method of FIG. 6 can be implemented in astorage device (103) illustrated in FIG. 1 using L-block techniquesdiscussed above in connection with FIGS. 3-6 .

In FIG. 6 , the method includes: dividing (341) a contiguous logicaladdress capacity (220) of non-volatile storage media (e.g., 109) intoblocks (e.g., 231, 233, . . . , 237, 239) according to a predeterminedblock size (133) and maintaining (343) a data structure (e.g.,illustrated in FIG. 4 ) with content identifying free blocks (e.g.,321-330) and blocks (e.g., 301-310) allocated to namespaces (281-285) inuse.

In response to receiving (345) a request that is determined (347) tocreate a new namespace, the method further includes allocating (349) anumber of free blocks to the namespace.

In response to receiving (345) a request that is determined (347) todelete an existing namespace, the method further includes returning(351) the blocks previously allocated to the namespace to the free blocklist (275) as free blocks.

In response to the request to create or delete a namespace, the methodfurther includes updating (353) the content of the data structure toidentify the currently available free blocks (e.g., 321-330) and blocks(e.g., 301-310) allocated to currently existing namespaces (281-285).

In response to receiving (355) a request to access a logical address ina particular namespace, the method further includes translating (357)the logical address to a physical address using the content of the datastructure.

For example, a storage device (103) illustrated in FIG. 1 has: a hostinterface (105); a controller (107); non-volatile storage media (109);and firmware (104) containing instructions which, when executed by thecontroller (107), instruct the controller (107) to at least: store ablock size (133) of logical addresses; divide a logical address capacity(220) of the non-volatile storage media (109) into L-blocks (e.g., 231,233, . . . , 237, 239) according to the block size (133); and maintain adata structure to identify: a free subset of the L-blocks that areavailable for allocation to new namespaces (e.g., L-blocks 321-330); andan allocated subset of the L-blocks that have been allocated to existingnamespaces (e.g., L-blocks 301-310). Preferably, the block size (133) isa power of two.

For example, the computer storage device (103) may be a solid statedrive that communicates with the host (101) in accordance with anon-volatile memory host controller interface specification (NVMHCI) fornamespace management and/or access.

After the host interface (105) receives a request from a host (101) toallocate a particular namespace (221) of a quantity of non-volatilememory, the controller (107), executing the firmware (104), allocates aset of blocks (233 and 237) from the free subset to the particularnamespace (221) and updates the content of the data structure. The setof blocks (233 and 237) allocated to the particular namespace (221) donot have to be contiguous in the logical address capacity (220), whichimproves the flexibility for dynamic namespace management.

Using the content of the data structure, the controller (107) executingthe firmware (104) translates logical addresses defined in the firstnamespace the mapped logical addresses (257) and then to physicaladdresses (259) for the non-volatile storage media (109).

After the host interface (105) receives a request from the host (101) todelete (263) a particular namespace (221), the controller (107),executing the firmware (104), updates the content of the data structureto return the set of blocks (233 and 237) allocated to the particularnamespace (221) from the allocated subset (e.g., 273) in the datastructure to the free subset (e.g., 275) in the data structure.

Preferably, the data structure includes an array of identifications ofblocks (301-310) in the allocated subset and pointers (291, 293, 295,297) to portions (301-302, 303-304, 305-308, 309-310) of the arraycontaining corresponding sets of identifications of blocks (301-310)that are allocated to respective ones of the existing namespaces (281,283, 285, 287).

Optionally, the data structure further includes a set of indicators(292, 294, 296, 298) for the respective ones of the existing namespaces(281, 283, 285, 287), where each of the indicators (292, 294, 296, 298)indicating whether or not a respective set of identifications of blocks(301-302, 303-304, 305-308, 209-310) allocated to a corresponding one ofthe existing namespaces (281, 283, 285, 287) is contiguous in thelogical address capacity (220) or space.

Optionally, the data structure includes an array of identifications offree blocks (321-330) in the free subset.

The logical address capacity (220) does not have to be a multiple of theblock size (133). When the logical address capacity (220) is not amultiple of the block size (133), an L-block (e.g., 239) that isinsufficient to be a full-size block may be not used.

The quantity of non-volatile memory requested for the creation (261) ofa namespace (e.g., 221) does not have to be a multiple of the block size(133). When the quantity is not a multiple of the block size (133), oneof the full blocks allocated to the namespace may not be fully utilized.

FIG. 7 shows an example diagram where a namespace is not aligned withblock boundaries and can be implemented using the techniques of FIGS.8-11 .

When a host (e.g., 101 in FIG. 1 ) requests the creation or reservationof a namespace (111) having a requested namespace size (131), acontroller (e.g., 107 in FIG. 1 ) allocates a section of itsnon-volatile storage media (e.g., 109 in FIG. 1 ) to be addressed viaLBA addresses under the namespace (111).

In a scenario illustrated in FIG. 7 , the requested namespace size (131)is not the multiple of the block size (133). As a result, if the firstLBA address in the namespace (111) representing a memory unit located inthe namespace (111) is aligned with (e.g., mapped to) the first LBAaddress of an L-block (e.g., 121), the last LBA address in the namespace(111) cannot be aligned with (e.g., mapped to) the last LBA address ofan L-block (e.g., 123), as illustrated in FIG. 7 . Therefore, thenamespace (111) is not aligned with boundaries of L-blocks forallocation. Since the requested namespace size (131) is not the multipleof the block size (133), the requested namespace size (131) is bestsatisfied by a number of full blocks (121, . . . , 123) and a portion(113) of a full block (127). The portion (113) is also referred to as apartial block (113).

In FIG. 7 , the portion (113) of the full block (127) (or partial block(113)) is allocated for the namespace (111); and the remaining portion(115) of the full block (127) (or partial block (115)) is not allocatedfor the namespace (111). The remaining portion (115), or a portion ofit, can be subsequently allocated to another namespace that also needs apartial block. Different namespaces may use different portions (e.g.,113, 115) of the full block (127).

FIG. 8 illustrates an example block diagram of a namespace map toimplement a namespace that is not aligned with block boundaries.

In FIG. 8 , a namespace map (135) is linked to the namespace (111) toidentify the blocks of LBA addresses allocated for the namespace (111).Any techniques for identification of the association of two items can beused to link the namespace map (135) to the namespace (111). Forexample, an identifier of the namespace map (135) can be stored inassociation with an identifier of the namespace (111) to link thenamespace map (135) and the namespace (111). For example, a list ofpointers corresponding to a list allocated namespaces can be used toidentify the beginning memory locations of data structures of namespacemaps to link the namespace maps with their namespaces. The addresses inthe L-blocks (e.g., (121, . . . , 123)) can be further translated to thecorresponding addresses of the physical storage locations by a separatelayer of the firmware (104) (e.g., flash translation layer (FTL) forsolid state drives (SSDs)).

The namespace map (135) includes the identifiers (141, . . . , 143) ofthe full blocks (121, . . . , 123) allocated for the namespace (111) andan identifier (147) of a partial block (113) allocated for the namespace(111).

Since the full blocks (121, . . . , 123) have the same, predeterminedblock size (133), the list of full block identifiers (141, . . . , 143)can be identified using an array or list of the identifiers of startingunits (or ending units) of the full blocks (121, . . . , 123). Thisarrangement simplifies the namespace map (135) and enables efficientaddress translation. However, the partial block (113) cannot berepresented in such a way.

FIG. 9 illustrates an example partial block identifier that can be usedto implement the namespace map of FIG. 8 .

In FIG. 9 , a partial block identifier (151) includes a starting unitidentifier (153) and a chunk size (155). The starting unit identifier(153) is an identifier of the first logical memory unit in the partialblock (e.g., 113 or 115) represented by the partial block identifier(151). When the partial block (113) is allocated on a chunk of memoryunits, the chunk size (155) represents the quantity of the memory unitsallocated to the partial block (113). Thus, the chunk size (155) can beadded to the starting unit identifier (153) to compute the ending unitidentifier, which is the last unit in the partial block (e.g., 113 or115) represented by the partial block identifier (151). In combination,the partial block identifier (151) identifies a unique portion (e.g.,113 or 115) of a full block (e.g., 127). When the chunk size (155) isequal to the block size (133), the partial block identifier (151)actually represents a full block. So, a partial block identifier (151)can be used to represent a full block (which can be subsequently dividedinto multiple partial blocks (e.g., 113 or 115)); and multiplecontiguous partial blocks (e.g., 113 or 115) can be combined into a fullblock (e.g., 127).

For example, the partial block identifier (151), having thecorresponding data specifying the starting unit identifier (153) and thechunk size (155) for the partial block (113), can be used as the partialblock identifier (147) in the namespace map (135) of FIG. 8 to representthe partial block (113) in FIG. 7 allocated for the namespace (111).

For example, the partial block identifier (151), having thecorresponding data specifying the starting unit identifier (153) and thechunk size (155) for the partial block (115), can be used to representthe unallocated partial block (115) in FIG. 7 that is free and availablefor allocation to another namespace. A linked list of unallocatedpartial blocks (e.g., 115) can be used to track a pool of free partialblocks.

Alternatively, the chunk size (155) in the partial block identifier(151) can be replaced with the ending unit identifier of thecorresponding partial block. The partial block identifier (151) can alsobe equivalently represented by a combination of the chunk size (155) andthe ending unit identifier.

The controller (107), programmed by the firmware (104), stores data(e.g., in volatile DRAM (106) and/or non-volatile storage media (109))to track a pool of free blocks using a linked list of partial blocks asillustrated in FIG. 10 .

Preferably, each namespace map (135) uses no more than one partial block(113) for efficient address translation. However, in some instances, anamespace map (e.g., 135) may include multiple partial blocks (e.g.,113) when there is not a single free partial block (e.g., 113) tosatisfy the request.

FIG. 10 illustrates an example data structure to manage a pool of freeblocks available for namespace allocation using the technique of FIG. 8.

A data structure of a free block pool (160) includes identifiers of freeblocks (161, 163, . . . , 165).

In one implementation, the free block pool (160) is used to track theavailable free partial blocks (e.g., 115) that can be allocated to newnamespaces. Each of the free blocks (161, 163, . . . , 165) can beidentified using the partial block identifier (151) illustrated inand/or discussed in connection with FIG. 9 .

In some implementations, the free block pool (160) also optionallytracks the available free full blocks (161, 163, . . . , 165), whereeach of the full blocks are conveniently represented using the datastructure of the partial block identifier (151) illustrated in FIG. 9 ,with the chunk size (155) being equal to the block size (133).

In other implementations, the free block pool (160) tracks the availablefree full blocks (161, 163, . . . , 165), using a list of full blockidentifiers in a way similar to the list of full block identifiers usedin the namespace map (135), where each of the full block identifiers ispresented by a representative unit identifier (e.g., a starting unit, oran ending unit), in view of the known, uniform block size (133) of thefull blocks.

The administrative manager (225) may use the partial blockidentification techniques discussed above in connection with FIGS. 7-10to efficiently handle the mismatch of the requested namespace size (131)and/or the capacity (220) with the block size (133), with increasedflexibility and minimum impact on address translation performance, asillustrated in FIG. 11 .

FIG. 11 illustrates an example of allocating namespaces using partialblocks.

For example, the technique of FIG. 11 can be used to facilitate dynamicnamespace management on the storage device (103) illustrated in FIG. 1using the partial block identification techniques of FIGS. 8-10 .

In FIG. 11 , the storage capacity (220) of the non-volatile storagemedia (109) is divided into blocks of LBA addresses (L-blocks) (231,233, . . . , 237) of the same size (e.g., 133 illustrated in FIG. 7 ),except that the last block (239) has a size smaller than thepredetermined block size (133). In FIG. 11 , the administrative manager(225) may virtually expand the last block (239) to include a virtualcapacity (249) such that the last block (239) may also be viewed to havethe same size (133). However, since the virtual capacity (249) is notavailable for allocation to any namespace, the administrative manager(225) puts the free portion of the last block (239) in a free block pool(160) as an available partial block (e.g., represented by a partialblock identifier (151) of FIG. 9 ), as if the portion of the virtualcapacity (249) had already been allocated to an existing namespace.

Preferably, the block size (133) is a power of two, which isadvantageous in optimizing the computations involving the block size(133). For example, when the block size (133) is a power of two,operations of division, modulo, and/or multiplication involving theblock size (133) can be simplified via shift operations.

The logical addresses in the L-blocks (231, 233, . . . , 237, 239) canbe translated into physical addresses of the non-volatile storage media(109) independent from the allocation of namespaces (e.g., 221, 223)(e.g., by a flash translation layer of the firmware (104) of the storagedevice (103) configured as a solid state drive (SSD)).

Dividing the storage capacity (220) into the (L-blocks) (231, 233, . . ., 237), with a possible partial block (239), allows the dynamicmanagement of namespaces at the block level. The logical addressesdefined in the namespaces (e.g., 221, 223) are mapped to the L-blocks(231, 233, 237, 239) defined on the capacity (220) such that thenamespace implementation details are shielded from the translation fromthe mapped logical address (257) in the L-blocks (231, 233, 237, 239) tothe physical addresses (259) of the non-volatile storage media (109).

For example, a full size block (241) of logical addresses in namespace A(221) is linearly mapped into the mapped logical addresses (257) in oneL-block (233). Similarly, a full size block (245) of logical addressesin namespace B (221) is linearly mapped into the mapped logicaladdresses (257) in another L-block (231). The block-wise mapping oflogical addresses improves efficiency in the address translation.

When the sizes of the namespaces (221, 223) are not multiples of theblock size (133), portions (243, 247) of the namespaces (221, 223) canbe mapped to partial blocks of one or more full size blocks (e.g., 237)in a way as illustrated in FIGS. 7-11 . The data structure of FIG. 4 canbe modified to include a partial block identifier (147) of a partialL-block (113) allocated to a namespace (221) that has a last portion(e.g., 243) that is smaller than the predetermined block size (133), andto include a list of free partial blocks.

By maintaining a namespace map (e.g., 135 illustrated in FIG. 8, 273illustrated in FIG. 4 , which may be further modified to include partialblock identifiers) and a free block pool (e.g., 160 illustrated in FIG.10, 275 illustrated in FIG. 4 , which may be further modified to includepartial block identifiers), the controller (107) of the storage device(103) allows dynamic management of namespaces, where namespaces may becreated/allocated when needed, deleted when no longer used, and/orresized, with fragmentation impact being reduced or eliminated. Themapping from the logical addresses in the namespace (e.g., 221, 223) tothe logical addresses for translation to physical addresses can bedynamically adjusted in response to the commands from the host (101) tocreate/allocate, delete, and/or resize namespaces (e.g., shrink orexpand).

Optionally, when the host (101) requests a namespace (e.g., 111, 221, or223) that has a size not aligned with a block boundary, the host (101)may be prompted to revise the size of the namespace (e.g., 111, 221, or223) for alignment with a block boundary.

FIG. 12 shows a method to allocate a namespace on a storage deviceaccording to one embodiment.

For example, the method of FIG. 12 can be implemented via executing thefirmware (104) by the controller (107) of the storage device (103).

The method includes receiving (201) a request to allocate a portion ofthe non-volatile storage media (109) of the storage device (103) for anamespace (111) having a requested namespace size (131), which may ormay not be a multiple of the size (133) of full L-blocks on the storagedevice (103).

In response to the request, the method further includes allocating (203)one or more full free L-blocks (121, . . . , and/or 123) to thenamespace (111) until a difference between the requested namespace size(131) and the allocated one or more full free L-blocks (121, . . . ,and/or 123) is smaller than the size (133) of a full L-block (e.g., 121,. . . , 123, or 127).

When the difference is smaller than the full block size (133), themethod further includes searching (205) a free block pool (160) for oneor more free partial blocks (161, 163, 165) having a total availablesize equal to or greater than the difference (113). Preferably, no morethan one partial block is used for the difference.

If one or more free partial blocks (e.g., 161) that have a total size ofavailable storage capacity equal to or greater than the difference (113)are found (207), the method further includes allocating (209) thedifference (113) from the one or more free partial blocks (e.g., 161).If the available storage capacity is larger than the difference (113),the remaining unallocated one or more partial blocks are free and remainin the pool (160). If the available storage capacity is equal to thedifference, the entirety of the one or more free partial blocks (e.g.,161) is allocated to the namespace (111) and thus removed from the freeblock pool (160).

If one or more free partial blocks having a total size of availablestorage capacity equal to or greater than the difference are not found(207), the method further includes: identifying (211) a full free block(e.g., 127); allocating (213) the difference (113) from the identifiedfull free block (e.g., 127); and adding (215) the remaining partialblock (115) of the identified full free block to the pool (160).

In some implementations, when there is no available full free block tosuccessfully carry out the operation of identifying (211) a full freeblock for the difference, the method may report an error or warning,and/or attempt to use more than one free partial block (e.g., 161 and163) to meet the difference.

When the namespace (111) is deleted, the partial block (113) allocatedfor the namespace (111) is freed and added to the free block pool (160);and full blocks (121, . . . , 123) allocated for the namespace (111) arealso freed and become available for allocation to other namespaces. Aroutine of the firmware (104) detects and combines contiguous freepartial blocks (e.g., 113 and 115) to reduce the numbers of partial freeblocks in the pool (160). When partial free blocks (e.g., 113 and 115)in the pool (160) are combined into a full free block (127), the partialfree blocks (e.g., 113 and 115) are converted into a free blockrepresentation (e.g., represented by the identification of arepresentative unit, such as a starting or ending unit).

For example, a computer storage device (103) of one embodiment includes:a host interface (105); a controller (107); and non-volatile storagemedia (109). The computer storage device (103) has firmware (104)containing instructions, which when executed by the controller (107),instruct the controller (107) to at least: receive, via the hostinterface (105), a request from a host (101) to allocate a namespace(111) of a requested namespace size (131) of non-volatile memory;generate, in response to the request, a namespace map (135) thatidentifies a plurality of L-blocks (121, . . . , 123), each having thesame predetermined block size (133), and a partial L-block (113) havinga size smaller than the predetermined block size (133); and convert,using the namespace map (135), logical addresses in the namespace (111)communicated from the host (101) to physical addresses (259) for thequantity of the non-volatile memory.

For example, the request to allocate the namespace (111) can be madeusing a protocol that is in accordance with non-volatile memory hostcontroller interface specification (NVMHCI) or NVMe.

For example, the computer storage device (103) can be a solid statedrive (SSD).

For example, a method implemented in the computer storage device (103)includes receiving, in the controller (107) coupled with a non-volatilestorage media (e.g., 109), a request from a host (101) to create orreserve a namespace (111) of a requested namespace size (131) ofnon-volatile memory from the non-volatile storage media (e.g., 109) ofthe computer storage device (103) (e.g., in accordance with NVMe). Inresponse to the request, the method further includes generating, by thecontroller (107), a namespace map (135) that identifies: a plurality ofL-blocks (121, . . . , 123) having a same predetermined block size(133), and a partial L-block (113) having a size smaller than thepredetermined block size (133). The L-blocks (121, . . . , 123, 113) arefurther translated to specific portions of the non-volatile storagemedia (e.g., 109) (e.g., via a translation layer). After the namespacemap (135) is generated for the namespace (111), the method furtherincludes converting, by the controller (107) using the namespace map(135), logical addresses in the namespace (111) communicated from thehost (101) to physical addresses for the quantity of the non-volatilememory.

Preferably, each of the plurality of L-blocks (121, . . . , 123) isrepresented in the namespace map (135) using a full block identifier(e.g., 141, . . . , or 143) that includes no more than an identificationof a representative unit (e.g., a starting unit or an ending unit), inview of the known, uniform block size (133) of full blocks (121, . . . ,123, 127). Optionally, a full block identifier (e.g., 141, . . . , or143) may include an indication of the block size (133) (e.g., byincluding both the identification of the starting unit, and theidentification of the ending unit).

Preferably, the partial L-block (113) is represented in the namespacemap (135) using an identifier (153) of a starting unit allocated for thenamespace (111) and a chunk size (155). The starting unit is notnecessarily the first unit in the full L-block (127) from which thepartial block (113) is allocated. For example, when a subsequentnamespace needs a partial block that has a size smaller than or equal tothe remaining block (115), the partial block allocated for thesubsequent namespace can have a starting unit that follows the endingunit of the partial block (113) in the L-block (127).

Alternatively, the partial L-block (113) can be represented in thenamespace map (135) by an identification of an ending unit allocated forthe namespace (111) (or another representative unit) and a chunk size(155).

Optionally, the method further includes maintaining, in the computerstorage device (103), a free block pool (160) that identifies anypartial L-block(s) (e.g., 127) available for allocation to anothernamespace.

Preferably, the computer storage device (103) stores a copy of thenamespace map (135) and the free block pool (160) in the non-volatilestorage media (e.g., 109) of the storage device (103) for persistentstorage and uses a copy of the namespace map (135) and the free blockpool (160) in the volatile DRAM (106) for computation.

As an example, generating the namespace map (135) can be performed via:allocating the plurality of L-blocks (121, . . . , 123) for thenamespace (111) such that the size difference between the requestednamespace size (131) of the namespace (111) and the plurality ofL-blocks (121, . . . , 123) is smaller than the block size (133). Afterthe determination of the difference between the quantity (133) ofnon-volatile memory requested for the namespace (111) and the total sizeof the plurality of full L-blocks (121, . . . , 123), the method furtherincludes searching in the free block pool (160) for a partial L-blockthat is equal to or larger than the difference.

If a first partial L-block (e.g., 161), having a size larger than thedifference, is found in the free block pool (160), the method furtherincludes: allocating a portion of the first partial L-block (e.g., 161)for the namespace (111) (e.g., by creating a partial block identifier(147) for the namespace map (135)); and updating the first partialL-block (161) in the free block pool (160) to represent a remainingportion of first partial L-block (e.g., 161) that is not allocated forthe namespace (111) and is free for allocation to another namespace.

If a first partial L-block (e.g., 161) having a size equal to thedifference is found in the free block pool (160), the method furtherincludes: removing the first partial L-block (e.g., 161) from the freeblock pool (160); and allocating the first partial L-block (e.g., 161)for the namespace (111).

If no partial L-block having a size equal to or larger than thedifference is found in the free block pool (160), a full size free block(e.g., 127) may be allocated for the pool (160) and temporarily treatedas a partial free block (e.g., 161). For example, the method furtherincludes: adding a first L-block (e.g., 127) having the samepredetermined block size (133) to the free block pool (160) (e.g., asthe free block (161)); allocating a portion (113) of the first L-blockfor the namespace (111); and updating the first L-block (161) in thefree block pool (160) to represent a remaining portion (115) of thefirst L-block (e.g., 127) that is not allocated for the namespace (111)and is free for allocation to another namespace.

Optionally, the method further includes receiving, in the controller(107), a request from the host (105) to delete the namespace (111), andadding, to the free block pool (160) by the controller (107) in responseto the request, the partial L-block (113), identified by the partialblock identifier (147) in the namespace map (135) of the namespace(111).

When the free block pool (160) has more than one partial free block(e.g., 113 and 115), the method optionally further includes:identifying, in the free block pool (160), contiguous free partialblocks (e.g., 113 and 115); and combining, in the free block pool (160),the contiguous free partial blocks (e.g., 113 and 115) into a singlefree partial block.

Optionally, the method further includes: after combining free partialblocks (e.g., 113 and 115) in the free block pool (160), determiningwhether a combined free partial block (e.g., 127) is a full free blockthat has the predetermined block size (133); and in response to adetermination that the combined free partial block (e.g., 127) has thepredetermined block size (133), removing the combined free partial block(e.g., 127) from the free block pool (160), such that the free blockpool (160) contains only the identifications of partial free blocks; andfree full blocks can be more efficiently represented by a list of fullblock identifiers, where each block in the free block pool (160) isrepresented by a partial block identifier having an identification of anunit in the block and a chunk size.

A non-transitory computer storage medium can be used to storeinstructions of the firmware (104). When the instructions are executedby the controller (107) of the computer storage device (103), theinstructions cause the controller (107) to perform a method discussedabove.

In this description, various functions and operations may be describedas being performed by or caused by computer instructions to simplifydescription. However, those skilled in the art will recognize what ismeant by such expressions is that the functions result from execution ofthe computer instructions by one or more controllers or processors, suchas a microprocessor. Alternatively, or in combination, the functions andoperations can be implemented using special purpose circuitry, with orwithout software instructions, such as using application-specificintegrated circuit (ASIC) or field-programmable gate array (FPGA).Embodiments can be implemented using hardwired circuitry withoutsoftware instructions, or in combination with software instructions.Thus, the techniques are limited neither to any specific combination ofhardware circuitry and software, nor to any particular source for theinstructions executed by the data processing system.

While some embodiments can be implemented in fully functioning computersand computer systems, various embodiments are capable of beingdistributed as a computing product in a variety of forms and are capableof being applied regardless of the particular type of machine orcomputer-readable media used to actually effect the distribution.

At least some aspects disclosed can be embodied, at least in part, insoftware. That is, the techniques may be carried out in a computersystem or other data processing system in response to its processor,such as a microprocessor or microcontroller, executing sequences ofinstructions contained in a memory, such as ROM, volatile RAM,non-volatile memory, cache or a remote storage device.

Routines executed to implement the embodiments may be implemented aspart of an operating system or a specific application, component,program, object, module or sequence of instructions referred to as“computer programs.” The computer programs typically comprise one ormore instructions set at various times in various memory and storagedevices in a computer, and that, when read and executed by one or moreprocessors in a computer, cause the computer to perform operationsnecessary to execute elements involving the various aspects.

A tangible, non-transitory computer storage medium can be used to storesoftware and data which, when executed by a data processing system,causes the system to perform various methods. The executable softwareand data may be stored in various places including for example ROM,volatile RAM, non-volatile memory and/or cache. Portions of thissoftware and/or data may be stored in any one of these storage devices.Further, the data and instructions can be obtained from centralizedservers or peer-to-peer networks. Different portions of the data andinstructions can be obtained from different centralized servers and/orpeer-to-peer networks at different times and in different communicationsessions or in a same communication session. The data and instructionscan be obtained in their entirety prior to the execution of theapplications. Alternatively, portions of the data and instructions canbe obtained dynamically, just in time, when needed for execution. Thus,it is not required that the data and instructions be on amachine-readable medium in their entirety at a particular instance oftime.

Examples of computer-readable storage media include, but are not limitedto, recordable and non-recordable type media such as volatile andnon-volatile memory devices, read only memory (ROM), random accessmemory (RAM), flash memory devices, floppy and other removable disks,magnetic disk storage media, and optical storage media (e.g., compactdisk read-only memory (CD ROM), digital versatile disks (DVDs), etc.),among others. The instructions may be embodied in a transitory medium,such as electrical, optical, acoustical or other forms of propagatedsignals, such as carrier waves, infrared signals, digital signals, etc.A transitory medium is typically used to transmit instructions, but notviewed as capable of storing the instructions.

In various embodiments, hardwired circuitry may be used in combinationwith software instructions to implement the techniques. Thus, thetechniques are neither limited to any specific combination of hardwarecircuitry and software, nor to any particular source for theinstructions executed by the data processing system.

Although some of the drawings illustrate a number of operations in aparticular order, operations that are not order dependent may bereordered and other operations may be combined or broken out. While somereordering or other groupings are specifically mentioned, others will beapparent to those of ordinary skill in the art and so do not present anexhaustive list of alternatives. Moreover, it should be recognized thatthe stages could be implemented in hardware, firmware, software or anycombination thereof.

The above description and drawings are illustrative and are not to beconstrued as limiting. Numerous specific details are described toprovide a thorough understanding. However, in certain instances, wellknown or conventional details are not described in order to avoidobscuring the description. References to one or an embodiment in thepresent disclosure are not necessarily references to the sameembodiment; and, such references mean at least one.

In the foregoing specification, the disclosure has been described withreference to specific exemplary embodiments thereof. It will be evidentthat various modifications may be made thereto without departing fromthe broader spirit and scope as set forth in the following claims. Thespecification and drawings are, accordingly, to be regarded in anillustrative sense rather than a restrictive sense.

What is claimed is:
 1. A device, comprising: a memory; and a circuitconfigured to translate, based on a plurality of block sizes, firstlogical addresses specified in first storage spaces defined in portionsof the memory into second logical addresses specified in a secondstorage space defined in the memory.
 2. The device of claim 1, whereinthe first storage spaces include a namespace allocated from a storagecapacity of the memory.
 3. The device of claim 2, wherein the secondstorage space includes the storage capacity.
 4. The device of claim 1,wherein the circuit is configured to divide, according to the pluralityof block sizes, the first logical addresses in the first storage spacesinto first blocks and map the first blocks into second blocks in thesecond storage space.
 5. The device of claim 4, wherein the first blocksinclude third logical addresses that are specified continuously in oneof the first storage spaces; and fourth logical addresses, mapped fromthe third logical addresses, are not continuous in the second storagespace.
 6. The device of claim 5, wherein the plurality of block sizesinclude a common block size shared across the first storage spaces indivision of the first logical addresses in the first storage spaces intothe first blocks.
 7. The device of claim 6, wherein each of the firststorage spaces is divided by no more than two block sizes; wherein eachof the first storage spaces is divided by at least one block size thatis no larger than the common block size; and wherein each of the firststorage spaces is divided to include no more than one block of logicaladdresses having a block size that is different from the common blocksize.
 8. The device of claim 7, wherein the circuit is configured atleast in part via firmware.
 9. The device of claim 7, wherein thecircuit is configured to consolidate at least two of the first blocksinto being mapped within a third block having the common block size inthe second storage space.
 10. A method, comprising: allocating aplurality of first storage spaces respectively from a plurality ofportions of a memory of a device; and translating, by the device basedon a plurality of block sizes, first logical addresses specified in thefirst storage spaces into second logical addresses specified in a secondstorage space defined in the memory.
 11. The method of claim 10, furthercomprising: dividing, according to the plurality of block sizes, thefirst logical addresses in the first storage spaces into first blocks tomap the first blocks into second blocks in the second storage space. 12.The method of claim 11, wherein the first blocks include third logicaladdresses that are specified continuously in one of the first storagespaces; and fourth logical addresses, mapped from the third logicaladdresses, are not continuous in the second storage space.
 13. Themethod of claim 12, wherein the plurality of block sizes include acommon block size shared across the first storage spaces in division ofthe first logical addresses in the first storage spaces into the firstblocks.
 14. The method of claim 13, wherein each of the first storagespaces is divided by no more than two block sizes; wherein each of thefirst storage spaces is divided by at least one block size that is nolarger than the common block size; and wherein each of the first storagespaces is divided to include no more than one block of logical addresseshaving a block size that is different from the common block size. 15.The method of claim 14, wherein the first storage spaces include anamespace allocated from a storage capacity of the memory; and thesecond storage space includes the storage capacity.
 16. The method ofclaim 14, further comprising: consolidating, at least two of the firstblocks into being mapped within a third block having the common blocksize in the second storage space.
 17. A non-transitory computer storagemedium storing instructions which, when executed by a device having amemory, cause the device to perform a method, the method comprising:allocating a plurality of first storage spaces respectively from aplurality of portions of the memory of the device; and translating, bythe device based on a plurality of block sizes, first logical addressesspecified in the first storage spaces into second logical addressesspecified in a second storage space defined in the memory.
 18. Thenon-transitory computer storage medium of claim 17, wherein the methodfurther comprises: dividing, according to the plurality of block sizes,the first logical addresses in the first storage spaces into firstblocks to map the first blocks into second blocks in the second storagespace.
 19. The non-transitory computer storage medium of claim 18,wherein the first blocks include third logical addresses that arespecified continuously in one of the first storage spaces; and fourthlogical addresses, mapped from the third logical addresses, are notcontinuous in the second storage space; and wherein the plurality ofblock sizes include a common block size shared across the first storagespaces in division of the first logical addresses in the first storagespaces into the first blocks.
 20. The non-transitory computer storagemedium of claim 19, wherein each of the first storage spaces is dividedby no more than two block sizes; wherein each of the first storagespaces is divided by at least one block size that is no larger than thecommon block size; wherein each of the first storage spaces is dividedto include no more than one block of logical addresses having a blocksize that is different from the common block size; and wherein themethod further comprises: consolidating, at least two of the firstblocks into being mapped within a third block having the common blocksize in the second storage space.